STMicroelectronics completes transition of small page NAND flash family to 90nm technology
		STMicroelectronics has announced full availability of its ‘Small Page’ NAND Flash memory family in 90nm process technology.The completion of the transition of 128-Mbit, 256-Mbit and 512-Mbit devices to this advanced manufacturing process establishes the family at the leading edge of NAND technology.

This will provide cost-saving storage solutions for products such as digital cameras, PDAs, GPS navigation systems, low-density Flash cards, USB drives, printers, set-top boxes, digitalTV, car multimedia systems and multimedia mobile handsets.

The NAND Flash devices provide ultra-fast data throughput and erase capability. The Address lines and Data Input/Output signals of all members of the family are multiplexed onto an 8-bit bus, reducing pin count, and allowing the use of a modular NAND interface which enables systems to be adapted to use higher (or lower) density devices without changing the device footprint.

A software tool chain available from ST allows the rapid development of products using the new memory chips, and can also help to extend their useful life. Tools include Error Correction Code (ECC) software; Bad Block Management (BBM) to recognize and replace a block that fails an Erase or Program operation by copying its data to a valid block; Wear Leveling algorithms to optimize the aging of the device by distributing Erase and Program operations among all the blocks; File System OS Native reference software; and hardware simulation models.

Memory is organized into 16 KB blocks, each of which is divided into pages of 512 bytes, plus 16 spare bytes per page, that can be read and programmed by page. Spare bytes are typically used for Error Correction Codes, software flags or Bad Block identification. A Copy Back Program mode enables data stored in one page to be programmed directly into another without the need for external buffering, a feature that is typically used to move the data if a Page Program operation fails due to a defective block. A Block Erase command with an erase time of 2ms is provided. Each block is specified for 100,000 Program and Erase cycles, and 10-year data retention.

Devices have a ‘Chip Enable Don’t Care’ feature, which simplifies the microcontroller interface and streamlines the use of NAND Flash in combination with other types of memory such as NOR Flash and xRAM – memory combinations are often used where faster devices are needed for code and working memory, while using the much lower cost and higher density NAND memory for large file storage. A unique device ID can be factory programmed, and a User Programmable Serial number supports increased security in the target application.

The 90nm Small Page NAND Flash family is available in volume now, with the following features:

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This news article was published in May 2006.